Synopsys targets physical AI complexity with co-design and agentic chip workflows

Synopsys targets physical AI complexity with co-design and agentic chip workflows The rapid evolution of intelligent software-defined systems is pushing chip design into a new era of physical AI, one where chip design complexity is outpacing traditional engineering methods. Manufacturers are racing to cram hundreds of billions of transistors into components that power everything from autonomous vehicles to hyperscale data centers. As a result, designing silicon has become extraordinarily complex, according to Prith Banerjee (pictured), senior vice president of innovation at Synopsys Inc. “It is one of the best applications you can imagine of applying AI to achieve a task,” Banerjee said. “There’s hardly anything more difficult these days than designing a chip.” Banerjee spoke with theCUBE’s Dave Vellante and Bob O’Donnell at the AMD Advancing AI event, during an exclusive broadcast on theCUBE, SiliconANGLE Media’s livestreaming studio. They discussed the recent strategic acquisition of Ansys alongside its resulting synergies and the long-term future of quantum computing within the electronic design automation space. (* Disclosure below) Chip design complexity drives Synopsys co-design approach in physical AI To manage chip design complexity without extending costly development cycles, the semiconductor industry is increasingly shifting toward advanced co-design methodologies. The combination of Synopsys and Ansys empowers developers to simulate thermal stress while concurrently writing software for hardware that has not yet been fabricated, Banerjee noted. “How do you co-design, concurrently design and simulate all of those things?” Banerjee said. “That’s the complexity we are trying to solve.” Designing modern processors with hundreds of billions of transistors requires precise thermal tolerances to ensure peak operational efficiency. Engineers cannot simply over-design these components with excessive material because the resulting data centers would draw unmanageable amounts of power, Banerjee noted. “If you put a factor of five more transistors, there’ll be so much power,” Banerjee said. “You have to design it exactly right.” AI is playing a central role in accelerating these workflows by replacing traditional brute-force simulation techniques with highly accurate predictive models. Synopsys has introduced multi-agent workflows that pair human engineers with digital assistants to handle repetitive design tasks, reducing time to tape-out across complex chip programs, Banerjee noted. “These agents work with human engineers, they collaborate with the multi-agent workflows,” Banerjee said. “That is how we are enabling AMD and other chip companies to tame the complexity.” That approach is also lowering the barrier to entry for startups. Rather than purchasing expensive licenses upfront, new entrants can now access Synopsys tools through a cloud-based startup program, making advanced chip design accessible without requiring large capital investments. “Rather than buying these really ridiculously expensive licenses from Synopsys, they can use the licenses on the cloud,” Banerjee said. “That’s how we democratize the design.” Looking ahead, Synopsys is exploring quantum computing to prepare for the next frontier of computational power — one that could process problems currently beyond the reach of classical silicon, Banerjee noted. “There will be a ChatGPT moment for quantum,” Banerjee said. “And when that happens, we want to be ready.” Here’s the complete video interview, part of SiliconANGLE’s and theCUBE’s coverage of the AMD Advancing AI event: (* Disclosure: TheCUBE is a paid media partner for the AMD Advancing AI event. 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